This session takes a detailed look at the architecture of Google’s Tensor Processing Unit (TPU), the LSI designed for neural network processing. We’ll cover quantization, CISC design, as well as the systolic array matrix unit that is the heart of the device. You’ll learn how a minimalistic design philosophy and a tight focus on neural network inference use-cases enabled Google to build and deploy such a high-performing device in just 15 months.
|Starts On||8/5/17, 11:40 AM|
|Session Duration||30 min|
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